Errata - Datasheets W65C816S

Errors in the latest (June 18, 2009) datasheet from WDC:

p. 52, sections 7.2.1 and 7.2.2

Clarification: the last sentence of section 7.2.1 and (all of) section 7.2.2 regarding emulation mode are correct, but note that they are specifically referring to the case when DL is equal to zero.

p. 52, sections 7.2.3

Minor typo: this section should read "…and DL is…" not "…and DL in…"

p. 53, section 7.7.1, 7.7.2, 7.7.3, 7.7.3.1, and 7.7.3.2.

Minor typo: These are subsections of section 7.8 and should be numbered 7.8.1, 7.8.2, 7.8.3, 7.8.3.1, and 7.8.3.2

p. 53, section 7.7.2 (sic)

This is incorrect. A Bank Address is multiplexed on the data bus in emulation mode. All 24-bit addressing modes (e.g. Absolute Long and [Direct]) will work in emulation mode. It is unclear what impact the caveat as written would have for the instructions listed. (It appears to be a caveat of the 65802 rather than the 65816.)

p. 53, section 7.7.3.2 (sic)

The last sentence is unclear. One way to clarify it is:"Also, the MVP and MVN instructions can only move data within the range 0000 to 00FF (Source Bank) and 0000 to 00FF (Destination Bank) in the emulation mode

p. 53, section 7.11.2

The claim the DBR is cleared to 00 is incorrect. The DBR register is unchanged, not cleared to 00 as the datasheet claims, when a BRK or COP is executed. The reset of the caveat is correct.

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