In section 8 of CMOS 65C02 Opcodes, in the last paragraph under "unused opcodes", opcodes $DC and $FC do indeed access (i.e. read) the memory location specified by the operand ($F0A9 in the example given) using absolute addressing, even though no flags or registers are affected, which is important is the address being accessed is an I/O location. Note that these are both 4 cycle instruction, like many other instructions (e.g. LDA) with absolute addressing.
However, opcode $5C does not access memory, though it does take 8 cycles.
Opcodes $x3, $x7, $xB, and $xF are 1 cycle instructions cannot access memory since that one cycle is reading the instruction.
Likewise, the unused $x2 opcodes are all two cycle, two byte instructions, which do not access memory, since in first cycle the (first byte of the) instruction is read, and in the second cycle the second (ignored) byte of the instruction is read.
As noted at http://www.laughtonelectronics.com/arcana/BrideOfSonPg5.html opcodes $44, $54, $D4, and $F4 all access memory; opcode $44 uses zp addressing (again, note that it is 3 cycles, like many other instructions with zero page addressing); the other three opcodes use zp,X addressing and are 4 cycle instructions, like many other instructions with zp,X addressing.
So opcode $42 can still be used as described, but opcode $5C (at a cost of 4 additional cycles as compared to BIT) should be used instead of opcodes $DC or $FC.
